纳秒脉冲下聚合物电树枝引发实验方法

 借鉴直流、交流的研究经验,比较了纳秒脉冲条件下几种不同的电树枝老化实验方法。对单针-板电极和多针-板电极在纳秒脉冲下实验结果的一致性进行考察,结果表明,多针-板电极系统可以在提高实验效率的同时保证结果的准确性。采用步进法和累加法进行了不同频率下聚苯乙烯电树枝引发实验,结果表明:两种方法得到的纳秒脉冲下聚苯乙烯电树枝引发电压-频率特性基本一致,在50~500 Hz范围内,引发电压随频率的升高而降低;在500~800 Hz范围内,引发电压随频率的升高而增加。最后讨论了对于不同脉冲功率装置中绝缘材料老化试验设计的方法。     

基于卷绕型带状线的感应电压叠加器的初步实验

 提出了一种基于卷绕型带状线和感应电压叠加器的重复频率脉冲电子束加速器的技术方案。介绍了一台感应电压叠加器感应单元的结构设计,并建立相应的电路模型,对其响应特性进行了模拟研究。介绍了卷绕型带状线的设计原理,制作了一台输出阻抗约3 Ω、脉冲宽度约230 ns的固态化卷绕型带状脉冲形成线。利用该脉冲发生器作为馈源,对感应电压叠加器感应单元的响应特性进行了实验研究,表明感应单元响应良好。对4级感应电压叠加器分别进行了单次脉冲和5 Hz重复频率的实验研究,结果表明叠加器的输出电压约为输入电压幅值的4倍,电流效率约80%,重复频率条件下,脉冲序列重复性较好。     

紧凑型X-pinch装置探头标定

 介绍了紧凑型X-pinch脉冲功率装置的电流电压测量设计方法。根据该装置的同轴传输线结构特点,研制了一种利用金属膜连接传输线外筒与负载外筒,构成回路测量负载电流的探头。在传输线末端设计电容分压器作为测量负载电压的探头,并利用电路模拟软件对此过程进行模拟,同时这两个探头需要进行在线标定。实验研究结果表明,该探头性能稳定、响应快,是测量负载电流与电压的理想工具。     

The low frequency behaviour in high frequency capacitance–voltage characteristics due to contribution of band-to-band tunnelling and generation–recombination in Hg0.75Cd0.25Te MIS capacitors

Hg_1−xCd_xTe Metal–Insulator–Semiconductor (MIS) capacitors were studied both experimentally and theoretically to investigate the capacitance contributions due to band-to-band (btb) tunnelling and generation–recombination (gr) of carriers to inversion layer capacitance. A good fit to the data has been obtained by including the btb contributions rather than gr contributions.     

Novel high-voltage self-adaptive power device based on interface charge＊

This paper presents a novel high-voltage lateral double diffused metal-oxide semiconductor （LDMOS） with self- adaptive interface charge （SAC） layer and its physical model of the vertical interface electric field. The SAC can be self-adaptive to collect high concentration dynamic inversion holes, which effectively enhance the electric field of dielectric buried layer （EI） and increase breakdown voltage （BV）. The BV and EI of SAC LDMOS increase to 612 V and 600 V/tim from 204 V and 90.7 V/ttm of the conventional silicon-on-insulator, respectively. Moreover, enhancement factors of r/which present the enhanced ability of interface charge on EI are defined and analysed.     

Ultra-low on-resistance high voltage (>600 V) SOI MOSFET with a reduced cell pitch

A low specific on-resistance (R S,on) silicon-on-insulator (SOI) trench MOSFET (metal-oxide-semiconductor-field-effect-transistor) with a reduced cell pitch is proposed.The lateral MOSFET features multiple trenches:two oxide trenches in the drift region and a trench gate extended to the buried oxide (BOX) (SOI MT MOSFET).Firstly,the oxide trenches increase the average electric field strength along the x direction due to lower permittivity of oxide compared with that of Si;secondly,the oxide trenches cause multiple-directional depletion,which improves the electric field distribution and enhances the reduced surface field (RESURF) effect in the SOI layer.Both of them result in a high breakdown voltage (BV).Thirdly,the oxide trenches cause the drift region to be folded in the vertical direction,leading to a shortened cell pitch and a reduced R S,on.Fourthly,the trench gate extended to the BOX further reduces R S,on,owing to the electron accumulation layer.The BV of the MT MOSFET increases from 309 V for a conventional SOI lateral double diffused metal-oxide semiconductor (LDMOS) to 632 V at the same half cell pitch of 21.5 μm,and R S,on decreases from 419 m · cm 2 to 36.6 m · cm 2.The proposed structure can also help to dramatically reduce the cell pitch at the same breakdown voltage.     

Research on high-voltage 4H-SiC P-i-N diode with planar edge junction termination techniques

The planar edge termination techniques of junction termination extension (JTE) and offset field plates and field-limiting rings for the 4H-SiC P-i-N diode were investigated and optimized by using a two-dimensional device simulator ISE-TCAD10.0. By experimental verification, a good consistency between simulation and experiment can be observed. The results show that the reverse breakdown voltage for the 4H-SiC P-i-N diode with optimized JTE edge termination can accomplish near ideal breakdown voltage and much lower leakage current. The breakdown voltage can be near 1650 V, which achieves more than 90 percent of ideal parallel plane junction breakdown voltage and the leakage current density can be near 3 × 10-5 A/cm2.     

Open-circuit voltage analysis of p-i-n type amorphous silicon solar cells deposited at low temperature

This paper identifies the contributions of p-a-SiC:H layers and i-a-Si:H layers to the open circuit voltage of p-i-n type a-Si:H solar cells deposited at a low temperature of 125 C.We find that poor quality p-a-SiC:H films under regular conditions lead to a restriction of open circuit voltage although the band gap of the i-layer varies widely.A significant improvement in open circuit voltage has been obtained by using high quality p-a-SiC:H films optimized at the "low-power regime" under low silane flow rates and high hydrogen dilution conditions.     

Analysis of statistical nature of electrical breakdown time delay in nitrogen at 6.6 mbar pressure in presence of positive ions and N(4S) atoms

On the basis of the mean value of electrical breakdown time delay and the standard deviation of electrical breakdown time delay σ dependence on the afterglow period τ, the mechanisms which dominantly influence to breakdown initiation in nitrogen were separated. It was shown that the positive ions formed in mutual collision of long‐lived metastable molecules have a dominant role in breakdown initiation for τ values up to 70 ms. The metastable molecules were derived from previous breakdown and discharge. In this case σ ≪ t_d and the total time delay t_d is approximately equal to formative time t_f which decreases in value with the increase of overvoltage. When positive ions have a dominant role in the breakdown initiation the Gaussian distribution describes data of t_d ≈ t_f very well. For τ > 1 s, N (⁴S) atoms formed in previous breakdown and discharge, have a dominant role in the breakdown initiation. Then, σ ≈ and Laue's distribution, which is valid for statistical time delay t_s, describes t_d data very well (© 2011 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)